Column: Running Intel's Numbers

Letter From Silicon Valley

Numbers are the lifeblood of Intel. Here are some of the numbers that can make--or break--the company, including how many bits of data its chips can crunch, the power those chips demand and exactly how much it costs to make each chip.

My recent story on Intel described the struggles within the company to get performance and power numbers right and the pain of trimming the costs of running the entire business. So far, Intel has cut staff, most significantly in marketing and management. But Intel's executives have more controls at their disposal, and how they tune those dials can be a strong indication of the health of the business today and over the year to come.

Those controls are buried deep in the intricacies of chip manufacturing. A neighbor of mine joined Intel in 1974. She remembers working in its first factory in Santa Clara, Calif., using scissors to cut circuit patterns into "rubies," sheets of red plastic. After she finished, others would take those ruby "masks" and shine light through them, exposing the surface of a silicon wafer covered with light-sensitive goop called a photoresist.

The chemicals hardened, forming a protective cover for the silicon. Then the silicon wafer was bathed in an acid bath to "etch," or dissolve, unwanted portions. Coat, expose, etch, rinse and repeat. The process would go on until the silicon was fully patterned with the electronic design.

I thought of my neighbor a few months ago when I visited one of Intel's finest "fabs" in Chandler, Ariz. The process is still called "lithography," but it bears as much resemblance to the work of 30 years ago as a robin does to a dinosaur.

The Chandler fab is an enormous squat building. Although it is staffed night and day by people, sturdy robotic boxes with an equally sturdy name ("Front-operating universal pods," or "FOUPs") run the show.

No person--even one suited up in one of Intel's stylishly androgynous "bunny" suits--ever touches a wafer. Instead, stacks of 25 wafers are encased in plastic cassettes. FOUPs, which travel along narrow gauge tracks in the ceiling, shuttle the cassettes from one stop to the next: to a machine that smears photoresist chemicals onto the wafers, or maybe to a machine that exposes them to ultraviolet light.

Coat, expose, etch, rinse and repeat. Some of the machines are so massive they require special bolts so that the floor beneath them will not buckle. All cost millions--even tens of millions--of dollars apiece. After about 60 days, the cassettes will have finished their Disneyland-like odyssey through the fab. They will have covered about 32 miles in their FOUPs. And then they will be shipped to another factory, where they will be sliced into individual chips and assembled into boards or modules for customers.

By the end of this year, Intel will be able to make chips with components measuring 45 nanometers wide. That size means designers can squeeze more than several hundred million onto a silicon chip smaller than a postage stamp. By contrast, Intel's 8080 microprocessor, introduced in 1974, had 4,500 transistors connected by circuit lines measuring six microns wide.

As the transistors get smaller, the silicon wafers are getting bigger. Today's top of the line silicon wafers measure 12 inches across; their immediate predecessors were a mere 8 inches in diameter. Thanks to the magic geometry of circles, the larger wafers have twice the surface area of the smaller ones. Better manufacturing techniques mean Intel has to use less energy and water to pattern the big guys.

Bottom line: It costs Intel less (in variable costs) to crank out chips in its latest and greatest fabs than it does in older ones. By next year, four of those 12-inch wafer fabs will be equipped to make chips with components measuring 45 nanometers.

The more chips Intel can build in its new fabs, the better its profits.

Or turn it around: Getting rid of some of its older fabs will perk up the bottom line.

Right now, Intel has a stable of 16 fabs operating or under construction, half of which can handle the big 12-inch wafers; the other half process smaller 8-inch disks. Five of those older fabs are in the U.S.

Intel has already put a Colorado fab up for sale and said it would cut the workforce at a New Mexico site by about 1,000 employees. Intel also recently said it would fold its assets for building a type of Flash memory into an independent company, formed jointly with STMicroelectronics.

That leaves five older fabs, including an operation in hometown Santa Clara.

In past years, Intel has converted older fabs so they can make smaller chips or work with larger wafers. But it's a numbers game: Since larger wafers can produce so many more chips, how many factories does a company really need?

Here's my bet: Between now and the end of the year, we'll see Intel sell off some of those older 200-millimeter fabs. Even the Santa Clara location could be on the block.

When that happens, you can expect to see the bottom line benefit--profitability will improve for at least a couple of quarters.

Once the endorphins of selling assets wear off, management will be left with the toughest task of all: growing the business.

With this contribution, I'm starting to morph this column into more of a blog-like conversation rather than a classic piece of reporting. Your comments are most welcome; you can send me a note at ecorcoran@forbes.com. If you do, please let me know if I can share your comments with readers.

http://www.forbes.com/home/technology/2007/06/04/intel-chips-fabs-tech-cz_ec_0605intel.html

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